A potential security vulnerability in some microprocessors may allow partial information disclosure via local access.
Description: Logic condition in specific microprocessors may allow an authenticated user to potentially enable partial physical address information disclosure via local access.
CVSS Base Score: 3.8 Low
CVSS Vector: CVSS:3.0/AV:L/AC:L/PR:L/UI:N/S:C/C:L/I:N/A:N
Intel® Core™ X-series Processors, 4th Generation Intel® Core™ i5 Processors,4th Generation Intel® Core™ i3 Processors, Intel® Pentium® Processor G Series, Intel® Pentium® Processor 3000 Series, Intel® Celeron® Processor 2000 Series, Intel® Xeon® Processor E7 v3 Family, Intel® Xeon® Processor E5 v3 Family, Intel® Xeon® Processor E3 v3 Family.
Partial physical address information potentially disclosed through exploitation of this vulnerability does not contain user secrets, but could potentially be utilized to enhance unrelated attack methods. For published exploits that Intel is aware of, Intel recommends users follow existing best practices including:
The use of DRAM modules resistant to Rowhammer style attacks.
Security Best Practices For Side Channel Resistance:
Guidelines For Mitigating Timing Side Channels Against Cryptographic Implementations:
Intel would like to thank Andrew Kwong, Daniel Genkin from University of Michigan and Daniel Gruss from Graz University of Technology and Yuval Yarom from University of Adelaide and Data61 for reporting this issue.
Intel, and nearly the entire technology industry, follows a disclosure practice called Coordinated Disclosure, under which a cybersecurity vulnerability is generally publicly disclosed only after mitigations are available.